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\documentclass{article}
\usepackage[english]{babel}
\usepackage[a4paper,top=2cm,bottom=2cm,left=2cm,right=2cm,marginparwidth=1.75cm]{geometry}
\usepackage{amsmath}
\usepackage{multicol}
\usepackage{textcomp}
\usepackage{graphicx}
\usepackage{float}
\usepackage{lipsum}
\usepackage{hyperref}
\usepackage{listings}
\renewcommand{\familydefault}{\sfdefault}
\title{
E-Smog detector PCB Design \linebreak
\large{EV6 - Hardware Implementation}
}
\author{Arne van Iterson}
\date{\today}
\begin{document}
\maketitle
\begin{center}
\begin{figure}[H]
\centering
\includegraphics[width=0.5\textwidth]{./img/kicad/e-smog.png}
\end{figure}
\end{center}
\begin{abstract}
This document will describe the design process of a noise detection circuit (E-Smog) and data logger using an STM32 Microcontroller
\end{abstract}
\newpage
\begin{multicols}{2}
\section{Introduction}
Electronic Smog or E-Smog is electromagnetic radiation emitted by every electronic device. The radiation can interfere with sensors and microphones, in extreme cases, the radiation can be harmful for human beings and animals. The TAPIR E-Smog detector is a circuit featured in Elektor Magazine issue 585 to measure said electromagnetic radiation. \cite{elektor}
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/esmog.png}
\caption{Man holding commercial ESmog detector}
\label{fig:man}
\end{figure}
Engineering Students of the University of Applied Sciences Utrecht have been tasked with designing a PCB for this circuit while extending the function of the circuit by including a STM32 microcontroller to log the amount of E-Smog detected.
\section{Design choices}
The complete circuit has been divided into several parts, each with its own function. The following sections will describe the design choices made for each distinct part of the circuit.
\subsection{Power supply}
\textit{The following parts can be found in the KiCad schematic sub-sheet 'power'.}
\subsubsection{Voltage regulators}
The circuit requires two voltages; 1,5 volts for the amplifier circuit and 3,3 volts for the STM32. The input voltage will be roughly between 3.0 and 3.6 volts based on three NiMH rechargeable batteries in series.
The amplifier circuit is rated to work at 1,5 volts, however, 1,5 volt low dropout regulators are not common. 1,8 volts is a lot more common, therefore the circuit has been simulated with 1,8 volts instead. The simulation of the circuit has been performed in NI Multisim 14.2, the circuit in question will be included in the appendix.
The output voltage of the simulated circuit is offset slightly higher at 1.8 Volts compared to 1.5 Volts, as measured at C4 in Figure \ref{fig:ogcircuit} the voltage offset is 669 millivolts instead of 639 millivolts. This is a difference of 30 millivolts, which is acceptable for the purpose of the circuit.
The increased current flow is also negligible, increasing from 1.04 milliamps to 1.37 milliamps.
\subsubsection{Soft power-on circuit}
\label{sec:spoc}
To turn the device on, a soft power-on circuit has been implemented. The circuit is based on the design by A. Levido and consists of a set of P- and N-channel MOSFETs, a push button and two schottky diodes. \cite{latchcircuit} In the schematic, the IRF7319 package is used, which contains both the P- and N-channel MOSFETs.
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/softpower.png}
\caption{Soft power-on circuit by A. Levido}
\label{fig:spwr}
\end{figure}
The P-Channel MOSFET is in between the battery and the LDO's, when the user presses the button the P-Channel closes and allows the circuit to power on, once the STM has booted, it closes the N-Channel that will keep the circuit on for the duration of the program. The push button is connected via two schottky diodes so it can double as a regular input button for the STM.
The logger was, as first, supposed to have an SD card to store logs to and a sudden power off could damage the file system of the SD card. The power button also pulls an IO pin on the STM32 low and this would be used to trigger a graceful power off sequence. The SD card has since been removed from the design but the soft power-on circuit has been kept.
\subsubsection{Battery voltage feedback}
The battery voltage is measured using a voltage divider and fed into the STM32 ADC. While this is a simple voltage divider. This is a very simple way to measure the battery voltage that has the disadvantage of constantly depleting the batteries, although very slowly. Using the current design, using two 1M resistors, the current flow is as follows:
\begin{align*}
R_{total} &= 2 & [M\Omega] \\
U &= 3.6 & [V] \\
I_{total} &= \frac{U}{R_{total}} \\
&= \frac{3.6}{2 \cdot 10^6} \\
&= 1.8 \cdot 10^{-3} & [mA] \\
\end{align*}
The self-discharge of the batteries is significantly higher than the current flow of the voltage divider, so the impact of the voltage divider is negligible.
\subsection{E-Smog circuit}
\textit{The following parts can be found in the KiCad schematic sub-sheet 'smog'.}
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/circuit.png}
\caption{Original Circuit}
\label{fig:ogcircuit}
\end{figure}
\subsubsection{Base circuit}
The base receiving circuit is functionally identical to the one found in the original Elektor Magazine. The required transistors have been replaced with SMD equivalents.
The antenna uses a Hirose U.FL connector, this connector is a small SMD component, commonly used in customer radio equipment such as access points and routers; This connector has primarily been chosen for this reason as it allows salvaging a simple wire antenna from such a device. It also allows for a smaller footprint compared to the RCA connector used on the original design.
\subsubsection{Amplifier}
The amplifier circuit is required to bring the signal from the E-Smog circuit to a level that is measurable by the STM32 ADC. The amplifier is a simple inverting op-amp circuit with a gain of 3 and an offset of 1.5 volts to get it around the middle of the ADC range. The LM321 has been used as the op-amp, this is a low power op-amp that can run on a single supply voltage. It is also fast enough for the desired purpose. The resulting simulated output to the ADC is offset at 1.5 volts and has a signal $V_{p-p}$ of 740 millivolts.
\subsubsection{Anti-aliasing filter}
For the ADC input, we want to attenuate the input signal above the Nyquist frequency to less than half LSB to prevent any aliasing.
The STM32L071 has a 12-bit ADC with a maximum sampling rate of 1.14Msps. The Nyquist frequency is half the sampling rate, so 570kHz.
For a 12 bit ADC, this LSB value is as follows:
\begin{align*}
U_{ref} &= 3.3 & [V] \\
LSB &= \frac{U_{ref}}{2^{12}} \\
&= \frac{3.3}{4096} \\
&= 0.0008056641 & [V] \\
&= 0.806 & [mV] \\
\frac{1}{2} LSB &= 0.403 & [mV]
\end{align*}
The amplifier can output 3.3V, so the input signal should be attenuated by a factor of:
\begin{align*}
20 \cdot \log{\frac{0.403e^{-3}}{3.3}} &= -78,26 & [dB]
\end{align*}
Since the circuits purpose is to measure E-Smog within the hearing range, the cutoff should ideally be near between 10 and 20 kHz. Attenuating the signal to a factor of -80dB at 570kHz would mean a cutoff frequency of 5,7 kHz using an LRC filter with a -40dB/decade slope, this is simply not acceptable.
Using the full 12-bits of the STM would reduce the amount of bandwidth and maximum measurable frequency, instead, the 10 bit mode of the ADC will be used. While this does limit resolution, the difference will be small since the effective resolution of the particular STM used is only 10.2 bits. \cite{stm32l071} This makes the LSB and cutoff frequency:
\begin{align*}
U_{ref} &= 3.3 & [V] \\
LSB &= \frac{U_{ref}}{2^{10}} \\
&= \frac{3.3}{1024} \\
&= 0.003222656 & [V] \\
&= 3.223 & [mV] \\
\frac{1}{2} LSB &= 1.611 & [mV] \\
\\
20 \cdot \log{\frac{1.611e^{-3}}{3.3}} &= -66.23 & [dB] \\
\\
f_{cutoff} &= 570000 \cdot 10^{-\frac{66.23}{40}} \\
&= 570000 \cdot 10^{-1.65575} \\
&= 12595.33 & [Hz]\\
\end{align*}
The required filter has been implemented using a LRC filter. The required parameters have been determined using the \textit{RLC Low-Pass Filter Design Tool} by OKAWA Electric Design. \cite{okawa} A capacitor of $6.8 \mu F$ and a inductor with a value of $22 \mu H$ and an internal resistance of $3.6 \Omega$ have been selected. The CWCI0603F-220KT package from Ceaiya has been selected as the inductor and resistor, a regular 0402 SMD capacitor completes the filter.
The resulting filter has been simulated and generates the following Bode plot:
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/bode.png}
\caption{Bode plot filter}
\label{fig:bpfilter}
\end{figure}
The bode plot shows the -66dB attenuation is roughly at the desired 570kHz and the cutoff frequency is at around 9kHz. This is not ideal but acceptable.
\subsection{Microcontroller}
\textit{The following parts can be found in the KiCad schematic sub-sheet 'stm'.}
\subsubsection{Choice of microcontroller}
The assignment requires the use of a STM32L series microcontroller; This is the low power series of the STM32 line. The entire series is relatively easy to implement and most if not all design choices in the following section are based directly on the AN4467 Application note by STMicroelectronics \cite{AN4467}
The STM32L071RBT has been selected with the help of the STM32 MCU product selector. The STM32L071RBT is available in a small but workable LQFP64 package and can be powered by a single 3.3 Volt supply. It has plenty of GPIO pins and a 12-bit ADC. All STM32L series microcontrollers use the ARM Cortex-M0+ core, so the selection was mostly based on the availability of the part itself. The STM32L071RBT is available as a Basic part on JLCPCB.
\subsubsection{Peripheral connections}
The STM32 has the following peripheral connections:
\begin{itemize}
\item Programming and debugging header present, connected to SWD. The pinout of this header has been determined by the application note \cite{AN4467}
\item I2C and UART are broken out to marked header pins
\begin{itemize}
\item I2C has unpopulated pads for pull-up resistors if these are not provided by the slave device(s).
\end{itemize}
\item NRST and BOOT0 are connected to buttons in accordance to the application note \cite{AN4467}
\item All VCC pins have a decoupling capacitor nearby in accordance to the application note \cite{AN4467}
\item An external crystal is used for the HSE, connection as described in the data sheet \cite{stm32l071}
\item Two LEDs are connected to GPIO pins via a MOSFET driver
\begin{itemize}
\item The power LED is connected to the same pin used as the power button override as described in section \ref{sec:spoc}, this allows the user to see when the STM has powered up.
\end{itemize}
\item All other IO has been broken out to headers J5 and J6
\end{itemize}
% Datasheet \cite{stm32l071}
\section{Printed Circuit Board design}
Similarly to the schematic, the PCB components have been placed in groups. Analog and digital switching components have been separated as much as possible. The PCB has been routed using the maze-method, X, Y-routing has been considered but ultimately not used. The resulting PCB would have been much more complex then necessary, since there are no high-speed signals that would benefit from X, Y-routing. Routing below the analog components has been kept to a minimum to prevent interference.
\subsection{Routing IO}
Breaking out all remaining MCU pins to the side of the PCB may not have been the greatest idea of all time and required some compromises. The STM32 microcontroller has been placed on a 45 degree angle to simplify the routing of all IO pins, however it still required long paths between the MCU and the headers. Additionally, the paths to the headers are placed quite close to each other which may cause interference, making the bus unusable for very high speed signals; This is not a problem for the intended use of the circuit.
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/silk_closeup.png}
\caption{Reference blocks in the silkscreen}
\label{fig:refblock}
\end{figure}
To route the IO, all other SMD parts have been packed closely together, which does not necessarily impact performance, but does make the PCB harder to assemble and required the use of reference blocks in the silkscreen to identify the components. An example of this can be seen in Figure \ref{fig:refblock}, take for example R5. Placing the silkscreen next to a component, such can be seen at C18, would have been preferable.
\subsection{DRC check}
The PCB has been checked using the default rules for DRC in KiCAD in addition to design rules set by the manufacturer JLCPCB, the end product does not contain any DRC errors.
\section{Peer reviewed corrections}
The following corrections have been made based on the peer review checklists in the appendix. Tom Selier noted the following issues from his checklist:
\begin{itemize}
\item Ground planes were not well connected
\item Decoupling capacitors did not have a fast path to ground
\item PCB dimensions were not present
\item Some components did not have proper thermal isolation from the ground plane
\item Voltage rails do not use thicker traces
\end{itemize}
Most of these issues have been resolved, the ground planes have been enlarged where possible and more via's were used to connect them. Decoupling capacitors have been checked and the ground connection has been improved wherever possible. The PCB dimensions, although not strictly required, were added to the bottom silkscreen of the board. Lastly, some components have been moved in order to improve thermal isolation from the ground plane and other components.
An issue that was not fixed was the use of thicker traces for the voltage rails, this could not be fixed without redesigning significant portions of the design; Which could not be done given the time constraints of the assignment. However, to ensure the current design would not cause a house fire, the current specifications of the traces have been checked using the \textit{PCB Trance Width Calculator} by DigiKey \cite{digikey}.
The current design uses three AAA batteries as a source of power, these batteries have a (very short) maximum current output of around 1 Ampere, this value is between 750 and 900 mA for NiMH cells. If the PCB is at JLCPCB, the top trace thickness would be $70\mu m$
Using these parameters in the calculator and assuming the worst case scenario of 1 A, the minimum trace width would be 0,065 mm. The current design uses a trace width of 0,25 mm, which is well in the safe zone.
\section{Conclusion}
Although there is room for improvement, the current design is functional and meets the requirements set by the assignment. The design has been checked using Multisim and the ERC and DRC checks in KiCad. The design has been peer-reviewed and the resulting corrections have been implemented. If the design were to be produced, the design is likely to work as intended.
\end{multicols}
\newpage
\bibliographystyle{IEEEtran}
\bibliography{main}
\newpage
\section{Appendix}
\subsection{Peer review checklists}
\subsubsection{Peer checklist (Dutch, Tom Selier)}
\begin{enumerate}
\item DRC van een PCB boer zijn geïmporteerd
\item DRC geeft geen bijzondere meldingen
\item Trace width presets zijn logisch en correct gebruikt
\item Geen losse kopervlakken
\item Grondvlakken zijn goed verbonden met elkaar
\item Ontkoppeling heeft een snel en logisch pad naar grond
\item Maatmarkeringen zijn aanwezig
\item Thermische scheiding is in acht genomen
\item Capillaire kracht is in acht genomen (tombstoning e.d.)
\item Alle componenten hebben een footprint en zijn aanwezig
\item Beschikbare ruimte is benut
\item Componenten zijn gegroepeerd op functie
\item Digitaal en analoog zijn zoveel mogelijk gescheiden
\item "Peelables" zijn z.v.m. voorkomen
\item Naam en functie staan op silkscreen
\end{enumerate}
\subsubsection{Own checklist}
\begin{enumerate}
\item ERC and DRC checks have been performed
\item Component placement is logical when cross-referenced with the schematic
\item Analog and digital circuits are separated
\item The PCB has been filled with ground planes
\item All filled areas are well connected
\item Via's between filled ares are not on the very edge of the filled area
\item Components connected to the filled area are connected by more than one spoke
\item The PCB only has components on one side
\item Digital interface requirements have been met (e.g. I2C pullups)
\item Switches and buttons are usable when the PCB is assembled
\item Decoupling capacitors are placed near the power pins of the IC
\item Most of the MCU pins used or broken out to headers
\item Headers other than the GPIO have been marked with their purpose
\item Silkscreen references are either next to the component or in a collection
\item Silkscreen references are visible after PCB assembly
\item The silkscreen features the name of the designer
\end{enumerate}
\newpage
\subsection{Multisim simulation}
\subsubsection{Analog circuit}
\begin{figure}[H]
\includegraphics[width=\linewidth]{./img/ms_circuit.png}
\caption{Multisim simulation of the analog circuit}
\label{fig:ms_circuit}
\end{figure}
\subsubsection{Filter circuit}
\begin{figure}[H]
\includegraphics{./img/ms_filter.png}
\caption{Multisim simulation of the filter circuit}
\label{fig:ms_circuit}
\end{figure}
\newpage
\subsection{KiCad Export}
The following exports will be appended to the document in the following order:
\begin{enumerate}
\item Schematic
\begin{itemize}
\item Sub-sheet 'power'
\item Sub-sheet 'smog'
\item Sub-sheet 'stm'
\end{itemize}
\item PCB
\begin{itemize}
\item Top layer
\item Bottom layer
\item Silkscreen top
\item Silkscreen bottom
\item Combination of all layers
\end{itemize}
\end{enumerate}
\end{document}
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